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author | Anshuman Khandual <anshuman.khandual@arm.com> | 2020-05-19 15:10:43 +0530 |
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committer | Will Deacon <will@kernel.org> | 2020-05-21 15:47:11 +0100 |
commit | 152accf8476f0447de57d9ffaf0c5ab578ed3d40 (patch) | |
tree | f9d95fa2d52bba9d46169d164a606a94144291a4 /lib/test_rhashtable.c | |
parent | dd35ec07045753adcc86f89d485e589d860e298f (diff) | |
download | lwn-152accf8476f0447de57d9ffaf0c5ab578ed3d40.tar.gz lwn-152accf8476f0447de57d9ffaf0c5ab578ed3d40.zip |
arm64/cpufeature: Introduce ID_MMFR5 CPU register
This adds basic building blocks required for ID_MMFR5 CPU register which
provides information about the implemented memory model and memory
management support in AArch32 state. This is added per ARM DDI 0487F.a
specification.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-7-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'lib/test_rhashtable.c')
0 files changed, 0 insertions, 0 deletions