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authorXiaofei Tan <tanxiaofei@huawei.com>2017-12-09 01:16:43 +0800
committerMartin K. Petersen <martin.petersen@oracle.com>2017-12-14 21:25:03 -0500
commit72f7fc3050d55e9877ecc56f33b7a434fca186f5 (patch)
tree70f016917e064773cc31cd58cae554ea654b4337 /lib/locking-selftest-softirq.h
parentf64715d2837bee8fcd71f3e13acc7f02c9e9d98a (diff)
downloadlwn-72f7fc3050d55e9877ecc56f33b7a434fca186f5.tar.gz
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scsi: hisi_sas: add v2 hw port AXI error handling support
Add port AXI errors handling for v2 hw. We do host controller reset for such errors. Besides, change port muli-bits ECC error handling, and we should also do host reset for such error. So, this patch put them in the same struct with port AXI error. Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'lib/locking-selftest-softirq.h')
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