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authorLinus Torvalds <torvalds@linux-foundation.org>2015-06-25 16:49:21 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-06-25 16:49:21 -0700
commit64e22b86854227b4d13a57fa02f26472bc426812 (patch)
tree2a23b94b3310592249c807c4235ff674b59d844a /include
parent6597ac8a514e2085cf19822a5783345c613312a5 (diff)
parent243918be6393f643e513a26e7882e6ae06ff7717 (diff)
downloadlwn-64e22b86854227b4d13a57fa02f26472bc426812.tar.gz
lwn-64e22b86854227b4d13a57fa02f26472bc426812.zip
Merge branch 'for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata updates from Tejun Heo: - a number of libata core changes to better support NCQ TRIM. - ahci now supports MSI-X in single IRQ mode to support a new controller which doesn't implement MSI or INTX. - ahci now supports edge-triggered IRQ mode to support a new controller which for some odd reason did edge-triggered IRQ. - the usual controller support additions and changes. * 'for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (27 commits) libata: Do not blacklist Micron M500DC ata: ahci_mvebu: add suspend/resume support ahci, msix: Fix build error for !PCI_MSI ahci: Add support for Cavium's ThunderX host controller ahci: Add generic MSI-X support for single interrupts to SATA PCI driver libata: finally use __initconst in ata_parse_force_one() drivers: ata: add support for Ceva sata host controller devicetree:bindings: add devicetree bindings for ceva ahci ahci: added support for Freescale AHCI sata ahci: Store irq number in struct ahci_host_priv ahci: Move interrupt enablement code to a separate function Doc: libata: Fix spelling typo found in libata.xml ata:sata_nv - Change 1 to true for bool type variable. ata: add Broadcom AHCI SATA3 driver for STB chips Documentation: devicetree: add Broadcom SATA binding libata: Fix regression when the NCQ Send and Receive log page is absent ata: hpt366: fix constant cast warning ata: ahci_xgene: potential NULL dereference in probe ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller. libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch. ...
Diffstat (limited to 'include')
-rw-r--r--include/linux/ata.h12
-rw-r--r--include/linux/libata.h1
2 files changed, 12 insertions, 1 deletions
diff --git a/include/linux/ata.h b/include/linux/ata.h
index b666b773e111..fed36418dd1c 100644
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -704,9 +704,19 @@ static inline bool ata_id_wcache_enabled(const u16 *id)
static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
{
+ /* Word 86 must have bit 15 set */
if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
return false;
- return id[ATA_ID_COMMAND_SET_3] & (1 << 3);
+
+ /* READ LOG DMA EXT support can be signaled either from word 119
+ * or from word 120. The format is the same for both words: Bit
+ * 15 must be cleared, bit 14 set and bit 3 set.
+ */
+ if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 ||
+ (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008)
+ return true;
+
+ return false;
}
static inline bool ata_id_has_sense_reporting(const u16 *id)
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 51cb312d9bb9..36ce37bcc963 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -430,6 +430,7 @@ enum {
ATA_HORKAGE_NOLPM = (1 << 20), /* don't use LPM */
ATA_HORKAGE_WD_BROKEN_LPM = (1 << 21), /* some WDs have broken LPM */
ATA_HORKAGE_ZERO_AFTER_TRIM = (1 << 22),/* guarantees zero after trim */
+ ATA_HORKAGE_NO_NCQ_LOG = (1 << 23), /* don't use NCQ for log read */
/* DMA mask for user DMA control: User visible values; DO NOT
renumber */