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authorEli Cohen <eli@mellanox.com>2016-06-22 17:27:26 +0300
committerBen Hutchings <ben@decadent.org.uk>2016-08-22 22:38:18 +0100
commit972fb25e0b214289f85acf46675eefda2e574cf4 (patch)
tree00ce04e727b0f077dc928e521e2bed220f3d2d1c /include
parent0993de3256271f11b8a4bb48e29bfdc842cf7d98 (diff)
downloadlwn-972fb25e0b214289f85acf46675eefda2e574cf4.tar.gz
lwn-972fb25e0b214289f85acf46675eefda2e574cf4.zip
IB/mlx5: Fix post send fence logic
commit c9b254955b9f8814966f5dabd34c39d0e0a2b437 upstream. If the caller specified IB_SEND_FENCE in the send flags of the work request and no previous work request stated that the successive one should be fenced, the work request would be executed without a fence. This could result in RDMA read or atomic operations failure due to a MR being invalidated. Fix this by adding the mlx5 enumeration for fencing RDMA/atomic operations and fix the logic to apply this. Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters') Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mlx5/qp.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index f190a94af174..ab1c14a56e6d 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -140,6 +140,7 @@ enum {
enum {
MLX5_FENCE_MODE_NONE = 0 << 5,
MLX5_FENCE_MODE_INITIATOR_SMALL = 1 << 5,
+ MLX5_FENCE_MODE_FENCE = 2 << 5,
MLX5_FENCE_MODE_STRONG_ORDERING = 3 << 5,
MLX5_FENCE_MODE_SMALL_AND_FENCE = 4 << 5,
};