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| author | Bjorn Helgaas <bhelgaas@google.com> | 2012-06-18 12:10:39 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-06-18 12:10:39 -0600 |
| commit | 47fcb6da65e9e74f71f4ec68f1245fc600bec711 (patch) | |
| tree | 6ef869c8f5768d8804ace7c36bbd6d493f995ad1 /include | |
| parent | cc2fa3fa320d5f40a12713c104bbe5d3da4636e4 (diff) | |
| parent | 9cb604ed45a31419bab3877472691a5da15a3c47 (diff) | |
| download | lwn-47fcb6da65e9e74f71f4ec68f1245fc600bec711.tar.gz lwn-47fcb6da65e9e74f71f4ec68f1245fc600bec711.zip | |
Merge branch 'topic/stowe-cap-cleanup' into next
* topic/stowe-cap-cleanup:
PCI: remove redundant capabilities checking in pci_{save, restore}_pcie_state
PCI: add pci_pcie_cap2() check for PCIe feature capabilities >= v2
PCI: remove redundant checking in PCI Express capability routines
PCI: make pci_ltr_supported() static
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/pci.h | 1 | ||||
| -rw-r--r-- | include/linux/pci_regs.h | 6 |
2 files changed, 6 insertions, 1 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index 35884f279bb8..43a007cbdf65 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -911,7 +911,6 @@ enum pci_obff_signal_type { int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type); void pci_disable_obff(struct pci_dev *dev); -bool pci_ltr_supported(struct pci_dev *dev); int pci_enable_ltr(struct pci_dev *dev); void pci_disable_ltr(struct pci_dev *dev); int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns); diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 526d2c4bc3a6..80e8605b5f93 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -521,6 +521,12 @@ #define PCI_EXP_RTSTA 32 /* Root Status */ #define PCI_EXP_RTSTA_PME 0x10000 /* PME status */ #define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */ +/* + * Note that the following PCI Express 'Capability Structure' registers + * were introduced with 'Capability Version' 0x2 (v2). These registers + * do not exist on devices with Capability Version 1. Use pci_pcie_cap2() + * to use these fields safely. + */ #define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */ #define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */ #define PCI_EXP_DEVCAP2_LTR 0x800 /* Latency tolerance reporting */ |