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| author | Jerome Brunet <jbrunet@baylibre.com> | 2020-03-03 20:29:56 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-03-06 12:06:01 -0800 |
| commit | d894992502474a6e84644012deb14a0280acbf96 (patch) | |
| tree | 84fa396ebf33c06c1117ca1b37f540935e8b03d1 /include | |
| parent | c3944ec8c6df256ab480b56cb776f36df44b2ba5 (diff) | |
| download | lwn-d894992502474a6e84644012deb14a0280acbf96.tar.gz lwn-d894992502474a6e84644012deb14a0280acbf96.zip | |
clk: rockchip: fix mmc get phase
If the mmc clock has no rate, it can be assumed to be constant.
In such case, there is no measurable phase shift. Just return 0
in this case instead of returning an error.
Fixes: 2760878662a2 ("clk: Bail out when calculating phase fails during clk registration")
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20200303192956.64410-1-jbrunet@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions