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authorMikko Perttunen <mperttunen@nvidia.com>2015-03-12 15:48:02 +0100
committerThierry Reding <treding@nvidia.com>2015-05-05 11:10:19 +0200
commit3d9dd6fdd23695a038633f1a87aee0708fe4b8e0 (patch)
treeba3f42569584f9eae8377be535acf160cd070fb0 /include/soc/tegra
parent6b22194d5e34f45b71628b7fd0a61e63df9e7dd7 (diff)
downloadlwn-3d9dd6fdd23695a038633f1a87aee0708fe4b8e0.tar.gz
lwn-3d9dd6fdd23695a038633f1a87aee0708fe4b8e0.zip
memory: tegra: Add API needed by the EMC driver
The EMC driver needs to know the number of external memory devices and also needs to update the EMEM configuration based on the new rate of the memory bus. To know how to update the EMEM config, looks up the values of the burst regs in the DT, for a given timing. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc/tegra')
-rw-r--r--include/soc/tegra/mc.h14
1 files changed, 13 insertions, 1 deletions
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h
index 63deb8d9f82a..90b558e2f3cd 100644
--- a/include/soc/tegra/mc.h
+++ b/include/soc/tegra/mc.h
@@ -20,6 +20,12 @@ struct tegra_smmu_enable {
unsigned int bit;
};
+struct tegra_mc_timing {
+ unsigned long rate;
+
+ u32 *emem_data;
+};
+
/* latency allowance */
struct tegra_mc_la {
unsigned int reg;
@@ -84,7 +90,7 @@ struct tegra_mc_soc {
const struct tegra_mc_client *clients;
unsigned int num_clients;
- const unsigned int *emem_regs;
+ const unsigned long *emem_regs;
unsigned int num_emem_regs;
unsigned int num_address_bits;
@@ -102,6 +108,12 @@ struct tegra_mc {
const struct tegra_mc_soc *soc;
unsigned long tick;
+
+ struct tegra_mc_timing *timings;
+ unsigned int num_timings;
};
+void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
+unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
+
#endif /* __SOC_TEGRA_MC_H__ */