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| author | Robert Baldyga <r.baldyga@samsung.com> | 2014-12-10 12:49:24 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-01-09 14:25:39 -0800 |
| commit | a291b7d5f600a068af1e2186ce590a9a39093ddb (patch) | |
| tree | 3ea12925b3cb13f0f3efe7d0f6d29ab042310f73 /include/linux/serial_s3c.h | |
| parent | 658c9d2b735fbc066a6608754b0eda77c92e637b (diff) | |
| download | lwn-a291b7d5f600a068af1e2186ce590a9a39093ddb.tar.gz lwn-a291b7d5f600a068af1e2186ce590a9a39093ddb.zip | |
serial: s3c: add missing register definitions
This macro definitions are necessary to implement DMA transfers
is samsung serial driver.
Based on previous work of Sylwester Nawrocki and Lukasz Czerwinski.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/serial_s3c.h')
| -rw-r--r-- | include/linux/serial_s3c.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h index e6fc9567690b..a7f004a3c177 100644 --- a/include/linux/serial_s3c.h +++ b/include/linux/serial_s3c.h @@ -104,6 +104,31 @@ S3C2410_UCON_RXIRQMODE | \ S3C2410_UCON_RXFIFO_TOI) +#define S3C64XX_UCON_TXBURST_1 (0<<20) +#define S3C64XX_UCON_TXBURST_4 (1<<20) +#define S3C64XX_UCON_TXBURST_8 (2<<20) +#define S3C64XX_UCON_TXBURST_16 (3<<20) +#define S3C64XX_UCON_TXBURST_MASK (0xf<<20) +#define S3C64XX_UCON_RXBURST_1 (0<<16) +#define S3C64XX_UCON_RXBURST_4 (1<<16) +#define S3C64XX_UCON_RXBURST_8 (2<<16) +#define S3C64XX_UCON_RXBURST_16 (3<<16) +#define S3C64XX_UCON_RXBURST_MASK (0xf<<16) +#define S3C64XX_UCON_TIMEOUT_SHIFT (12) +#define S3C64XX_UCON_TIMEOUT_MASK (0xf<<12) +#define S3C64XX_UCON_EMPTYINT_EN (1<<11) +#define S3C64XX_UCON_DMASUS_EN (1<<10) +#define S3C64XX_UCON_TXINT_LEVEL (1<<9) +#define S3C64XX_UCON_RXINT_LEVEL (1<<8) +#define S3C64XX_UCON_TIMEOUT_EN (1<<7) +#define S3C64XX_UCON_ERRINT_EN (1<<6) +#define S3C64XX_UCON_TXMODE_DMA (2<<2) +#define S3C64XX_UCON_TXMODE_CPU (1<<2) +#define S3C64XX_UCON_TXMODE_MASK (3<<2) +#define S3C64XX_UCON_RXMODE_DMA (2<<0) +#define S3C64XX_UCON_RXMODE_CPU (1<<0) +#define S3C64XX_UCON_RXMODE_MASK (3<<0) + #define S3C2410_UFCON_FIFOMODE (1<<0) #define S3C2410_UFCON_TXTRIG0 (0<<6) #define S3C2410_UFCON_RXTRIG8 (1<<4) @@ -155,6 +180,7 @@ #define S3C2440_UFSTAT_TXMASK (63<<8) #define S3C2440_UFSTAT_RXMASK (63) +#define S3C2410_UTRSTAT_TIMEOUT (1<<3) #define S3C2410_UTRSTAT_TXE (1<<2) #define S3C2410_UTRSTAT_TXFE (1<<1) #define S3C2410_UTRSTAT_RXDR (1<<0) @@ -179,8 +205,10 @@ #define S3C64XX_UINTM 0x38 #define S3C64XX_UINTM_RXD (0) +#define S3C64XX_UINTM_ERROR (1) #define S3C64XX_UINTM_TXD (2) #define S3C64XX_UINTM_RXD_MSK (1 << S3C64XX_UINTM_RXD) +#define S3C64XX_UINTM_ERR_MSK (1 << S3C64XX_UINTM_ERROR) #define S3C64XX_UINTM_TXD_MSK (1 << S3C64XX_UINTM_TXD) /* Following are specific to S5PV210 */ |