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authorFeng Tang <feng.tang@intel.com>2010-07-27 08:20:22 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2010-08-10 13:47:46 -0700
commitd843fc6e9dc9bee7061b6833594860ea93ad98e1 (patch)
tree825f25909de7b4056a5c8e4180b2068fff339070 /include/linux/serial_core.h
parent464eb8f596fcbdadcfbbdb4a84847ffcb93cc4dd (diff)
downloadlwn-d843fc6e9dc9bee7061b6833594860ea93ad98e1.tar.gz
lwn-d843fc6e9dc9bee7061b6833594860ea93ad98e1.zip
hsu: driver for Medfield High Speed UART device
This is a PCI & UART driver, which suppors both PIO and DMA mode UART operation. It has 3 identical UART ports and one internal DMA controller. Current FW will export 4 pci devices for hsu: 3 uart ports and 1 dma controller, each has one IRQ line. And we need to discuss the device model, one PCI device covering whole HSU should be a better model, but there is a problem of how to export the 4 IRQs info Current driver set the highest baud rate to 2746800bps, which is easy to scale down to 115200/230400.... To suport higher baud rate, we need add special process, change DLAB/DLH/PS/DIV/MUL registers all together. 921600 is the highest baud rate that has been tested with Bluetooth modem connected to HSU port 0. Will test more when there is right BT firmware. Current version contains several work around for A0's Silicon bugs Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/linux/serial_core.h')
-rw-r--r--include/linux/serial_core.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 9ddc866ccc09..f8fce351463d 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -189,6 +189,8 @@
/* MAX3107 */
#define PORT_MAX3107 94
+/* High Speed UART for Medfield */
+#define PORT_MFD 95
#ifdef __KERNEL__