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authorKeith Busch <keith.busch@intel.com>2016-05-02 15:10:31 -0500
committerBjorn Helgaas <bhelgaas@google.com>2016-05-03 10:35:49 -0500
commit10126ac14d36e74b2705802dc915b0b18463a51f (patch)
tree9cff4695f03085209d3ebf71ecfdc1cd50054756 /include/linux/pcieport_if.h
parent6d81417da8720b393f670de9cce03a3642ea9a30 (diff)
downloadlwn-10126ac14d36e74b2705802dc915b0b18463a51f.tar.gz
lwn-10126ac14d36e74b2705802dc915b0b18463a51f.zip
PCI: Add Downstream Port Containment portdrv service type
Add the Downstream Port Containment (PCIE_PORT_SERVICE_DPC) portdrv service type, available if the device has the DPC extended capability. [bhelgaas: split to separate patch, changelog] Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/linux/pcieport_if.h')
-rw-r--r--include/linux/pcieport_if.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/pcieport_if.h b/include/linux/pcieport_if.h
index 4f1089f2cc98..afcd130ab3a9 100644
--- a/include/linux/pcieport_if.h
+++ b/include/linux/pcieport_if.h
@@ -21,6 +21,8 @@
#define PCIE_PORT_SERVICE_HP (1 << PCIE_PORT_SERVICE_HP_SHIFT)
#define PCIE_PORT_SERVICE_VC_SHIFT 3 /* Virtual Channel */
#define PCIE_PORT_SERVICE_VC (1 << PCIE_PORT_SERVICE_VC_SHIFT)
+#define PCIE_PORT_SERVICE_DPC_SHIFT 4 /* Downstream Port Containment */
+#define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT)
struct pcie_device {
int irq; /* Service IRQ/MSI/MSI-X Vector */