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| author | Yu Zhao <yu.zhao@intel.com> | 2009-02-16 02:55:47 +0800 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-03-26 16:02:30 -0700 |
| commit | 898585172fa729513d8636257b44bd1cfd279096 (patch) | |
| tree | 8c2b7305dc95aaac5836a28d8a59efaa743e56ba /include/linux/pci_regs.h | |
| parent | 7bb2cb3e90dc49be1cd14956c155451499c857a7 (diff) | |
| download | lwn-898585172fa729513d8636257b44bd1cfd279096.tar.gz lwn-898585172fa729513d8636257b44bd1cfd279096.zip | |
PCI: save and restore PCIe 2.0 registers
PCIe 2.0 defines several new registers (Device Control 2, Link Control 2,
and Slot Control 2). Save and retore them in pci_save_pcie_state() and
pci_restore_pcie_state().
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'include/linux/pci_regs.h')
| -rw-r--r-- | include/linux/pci_regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index d4e663877f45..e4d08c1b2e0b 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -488,6 +488,8 @@ #define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */ #define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ #define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */ +#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ +#define PCI_EXP_SLTCTL2 56 /* Slot Control 2 */ /* Extended Capabilities (PCI-X 2.0 and Express) */ #define PCI_EXT_CAP_ID(header) (header & 0x0000ffff) |