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author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2018-07-17 10:31:23 -0500 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-08-15 14:35:40 -0500 |
commit | 45687f96c112adda2f1d1f05b977661eb00d5a1c (patch) | |
tree | 98324617bad12271bd2d4a0f940f2499214583ae /include/linux/pci.h | |
parent | 944d58595be02634cc295e341306ccda2365554d (diff) | |
download | lwn-45687f96c112adda2f1d1f05b977661eb00d5a1c.tar.gz lwn-45687f96c112adda2f1d1f05b977661eb00d5a1c.zip |
PCI/AER: Don't clear AER bits if error handling is Firmware-First
If the platform requests Firmware-First error handling, firmware is
responsible for reading and clearing AER status bits. If OSPM also clears
them, we may miss errors. See ACPI v6.2, sec 18.3.2.5 and 18.4.
This race is mostly of theoretical significance, as it is not easy to
reasonably demonstrate it in testing.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[bhelgaas: add similar guards to pci_cleanup_aer_uncorrect_error_status()
and pci_aer_clear_fatal_status()]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/linux/pci.h')
0 files changed, 0 insertions, 0 deletions