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author | Kishon Vijay Abraham I <kishon@ti.com> | 2019-03-25 15:09:39 +0530 |
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committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-04-15 13:24:02 +0100 |
commit | 2a9a801620efac92885fc9cd53594c0b9aba87a4 (patch) | |
tree | 7929d63f8828b13144f2ce30755497b74e520cb7 /include/linux/pci-epc.h | |
parent | fbb2de891cc4d69c0c80c4116cf870a99235cfe8 (diff) | |
download | lwn-2a9a801620efac92885fc9cd53594c0b9aba87a4.tar.gz lwn-2a9a801620efac92885fc9cd53594c0b9aba87a4.zip |
PCI: endpoint: Add support to specify alignment for buffers allocated to BARs
The address that is allocated using pci_epf_alloc_space() is
directly written to the target address of the Inbound Address
Translation unit (ie the HW component implementing inbound address
decoding) on endpoint controllers.
Designware IP [1] has a configuration parameter (CX_ATU_MIN_REGION_SIZE
[2]) which has 64KB as default value and the lower 16 bits of the Base,
Limit and Target registers of the Inbound ATU are fixed to zero. If the
programmed memory address is not aligned to 64 KB boundary this causes
memory corruption.
Modify pci_epf_alloc_space() API to take alignment size as argument in
order to allocate buffers to be mapped to BARs with an alignment that
suits the platform where they are used.
Add an 'align' parameter to epc_features which can be used by platform
drivers to specify the BAR allocation alignment requirements and use
this while invoking pci_epf_alloc_space().
[1] "I/O and MEM Match Modes" section in DesignWare Cores PCI Express
Controller Databook version 4.90a
[2] http://www.ti.com/lit/ug/spruid7c/spruid7c.pdf
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'include/linux/pci-epc.h')
-rw-r--r-- | include/linux/pci-epc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index c3ffa3917f88..f641badc2c61 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -109,6 +109,7 @@ struct pci_epc { * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs * @bar_fixed_size: Array specifying the size supported by each BAR + * @align: alignment size required for BAR buffer allocation */ struct pci_epc_features { unsigned int linkup_notifier : 1; @@ -117,6 +118,7 @@ struct pci_epc_features { u8 reserved_bar; u8 bar_fixed_64bit; u64 bar_fixed_size[BAR_5 + 1]; + size_t align; }; #define to_pci_epc(device) container_of((device), struct pci_epc, dev) |