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| author | Tomasz Nowicki <tn@semihalf.com> | 2016-11-30 23:16:34 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <helgaas@kernel.org> | 2016-12-06 13:45:50 -0600 |
| commit | 648d93fc77da4f655cf13108417f33c91d745e2c (patch) | |
| tree | 55c0349c7acdf43be0dcbbc45f9523341d9536b7 /include/linux/pci-ecam.h | |
| parent | 44f22bd91e88f9a1203a6e564a237e593f5f2f74 (diff) | |
| download | lwn-648d93fc77da4f655cf13108417f33c91d745e2c.tar.gz lwn-648d93fc77da4f655cf13108417f33c91d745e2c.zip | |
PCI: Add MCFG quirks for Cavium ThunderX pass1.x host controller
ThunderX pass1.x requires to emulate the EA headers for on-chip devices
hence it has to use custom pci_thunder_ecam_ops for accessing PCI config
space (pci-thunder-ecam.c). Add new entries to MCFG quirk array where it
can be applied while probing ACPI based PCI host controller.
ThunderX pass1.x is using the same way for accessing off-chip devices
(so-called PEM) as silicon pass-2.x so we need to add PEM quirk entries
too.
Quirk is considered for ThunderX silicon pass1.x only which is identified
via MCFG revision 2.
ThunderX pass 1.x requires the following accessors:
NUMA node 0 PCI segments 0- 3: pci_thunder_ecam_ops (MCFG quirk)
NUMA node 0 PCI segments 4- 9: thunder_pem_ecam_ops (MCFG quirk)
NUMA node 1 PCI segments 10-13: pci_thunder_ecam_ops (MCFG quirk)
NUMA node 1 PCI segments 14-19: thunder_pem_ecam_ops (MCFG quirk)
[bhelgaas: change Makefile/ifdefs so quirk doesn't depend on
CONFIG_PCI_HOST_THUNDER_ECAM]
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/linux/pci-ecam.h')
| -rw-r--r-- | include/linux/pci-ecam.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h index e88d7db74200..00eb8eb774e2 100644 --- a/include/linux/pci-ecam.h +++ b/include/linux/pci-ecam.h @@ -62,7 +62,8 @@ extern struct pci_ecam_ops pci_generic_ecam_ops; #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) extern struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */ extern struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */ -extern struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 2.x */ +extern struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */ +extern struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ #endif #ifdef CONFIG_PCI_HOST_GENERIC |