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| author | Jiri Pirko <jiri@nvidia.com> | 2024-01-03 14:28:36 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-01-05 07:58:19 -0800 |
| commit | 8a6286c1804e2c7144aef3154a0357c4b496e10b (patch) | |
| tree | 6f7e86daa06fe9de97c1fb35703b151c56e14096 /include/linux/dpll.h | |
| parent | 82e7b22f647202ecd8f25de2bd3f1276bbd34989 (diff) | |
| download | lwn-8a6286c1804e2c7144aef3154a0357c4b496e10b.tar.gz lwn-8a6286c1804e2c7144aef3154a0357c4b496e10b.zip | |
dpll: expose fractional frequency offset value to user
Add a new netlink attribute to expose fractional frequency offset value
for a pin. Add an op to get the value from the driver.
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Acked-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Acked-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Link: https://lore.kernel.org/r/20240103132838.1501801-2-jiri@resnulli.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/linux/dpll.h')
| -rw-r--r-- | include/linux/dpll.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/dpll.h b/include/linux/dpll.h index b1a5f9ca8ee5..9cf896ea1d41 100644 --- a/include/linux/dpll.h +++ b/include/linux/dpll.h @@ -77,6 +77,9 @@ struct dpll_pin_ops { const struct dpll_device *dpll, void *dpll_priv, const s32 phase_adjust, struct netlink_ext_ack *extack); + int (*ffo_get)(const struct dpll_pin *pin, void *pin_priv, + const struct dpll_device *dpll, void *dpll_priv, + s64 *ffo, struct netlink_ext_ack *extack); }; struct dpll_pin_frequency { |