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authorJoe Perches <joe@perches.com>2008-02-03 17:45:46 +0200
committerAdrian Bunk <bunk@kernel.org>2008-02-03 17:45:46 +0200
commitfd3f8984f6fa1ad1a6c2283eef48ba6e5242bcc5 (patch)
tree12f69b5301ece00daff4a73aa9ed92e9e88d07a0 /include/linux/cyclades.h
parentab690d9fedf5103bc3057bcd20555159f613b5f2 (diff)
downloadlwn-fd3f8984f6fa1ad1a6c2283eef48ba6e5242bcc5.tar.gz
lwn-fd3f8984f6fa1ad1a6c2283eef48ba6e5242bcc5.zip
include/linux/: Spelling fixes
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'include/linux/cyclades.h')
-rw-r--r--include/linux/cyclades.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/cyclades.h b/include/linux/cyclades.h
index 8f3dcd30828f..504cb2c3fa9a 100644
--- a/include/linux/cyclades.h
+++ b/include/linux/cyclades.h
@@ -177,7 +177,7 @@ struct CUSTOM_REG {
__u32 fpga_version; /* FPGA Version Number Register */
__u32 cpu_start; /* CPU start Register (write) */
__u32 cpu_stop; /* CPU stop Register (write) */
- __u32 misc_reg; /* Miscelaneous Register */
+ __u32 misc_reg; /* Miscellaneous Register */
__u32 idt_mode; /* IDT mode Register */
__u32 uart_irq_status; /* UART IRQ status Register */
__u32 clear_timer0_irq; /* Clear timer interrupt Register */