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authorShaokun Zhang <zhangshaokun@hisilicon.com>2017-10-19 19:05:20 +0800
committerWill Deacon <will.deacon@arm.com>2017-10-19 17:06:35 +0100
commit904dcf03f086a2e3b9d1e02cb57c43ea2e588c8c (patch)
treec9a4482bd8c5b33d64bc1220254d266bf3d6072d /include/linux/cpuhotplug.h
parent2bab3cf9104c5ab80a1b9c706d81d997548401e4 (diff)
downloadlwn-904dcf03f086a2e3b9d1e02cb57c43ea2e588c8c.tar.gz
lwn-904dcf03f086a2e3b9d1e02cb57c43ea2e588c8c.zip
perf: hisi: Add support for HiSilicon SoC DDRC PMU driver
This patch adds support for DDRC PMU driver in HiSilicon SoC chip, Each DDRC has own control, counter and interrupt registers and is an separate PMU. For each DDRC PMU, it has 8-fixed-purpose counters which have been mapped to 8-events by hardware, it assumes that counter index is equal to event code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Anurup M <anurup.m@huawei.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'include/linux/cpuhotplug.h')
-rw-r--r--include/linux/cpuhotplug.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h
index cd63c52e7d93..587006de6f82 100644
--- a/include/linux/cpuhotplug.h
+++ b/include/linux/cpuhotplug.h
@@ -153,6 +153,7 @@ enum cpuhp_state {
CPUHP_AP_PERF_S390_SF_ONLINE,
CPUHP_AP_PERF_ARM_CCI_ONLINE,
CPUHP_AP_PERF_ARM_CCN_ONLINE,
+ CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE,
CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE,
CPUHP_AP_PERF_ARM_HISI_L3_ONLINE,
CPUHP_AP_PERF_ARM_L2X0_ONLINE,