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author | Chunyan Zhang <zhang.chunyan@linaro.org> | 2015-10-07 09:26:38 -0600 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-07 17:54:09 +0100 |
commit | 497b59565b25d6dd2441bc483f3811ee27a0c7b0 (patch) | |
tree | 2aa5156d0f75f9bac8a6603c519fd7087f288a6c /include/linux/coresight.h | |
parent | c39b7eef7d92f5ffef1abf04227a62fa2a6a62b2 (diff) | |
download | lwn-497b59565b25d6dd2441bc483f3811ee27a0c7b0.tar.gz lwn-497b59565b25d6dd2441bc483f3811ee27a0c7b0.zip |
Coresight: ETMv4: Prevent TRCRSCTLR0&1 from being accessed
1. TRCRSCTLRn - Resource Selection Control Registers n=0~1 are reserved,
we shouldn't access them.
2. The max number of 'n' here is defined in TRCIDR4.NUMRSPAIR whoes value
indicates the number of resource selection *pairs*, and 0 indicates
one resource selection pair, 1 indicates two pairs, and so on ...
So, the total number of resource selection control registers which we can
access is (TRCIDR4.NUMRSPAIR * 2)
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/coresight.h')
0 files changed, 0 insertions, 0 deletions