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| author | Jonas Gorski <jonas.gorski@gmail.com> | 2019-04-18 13:12:06 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-04-23 10:57:48 -0700 |
| commit | d1c8a501ec07290da5cc2d8dedb6692cf89078d8 (patch) | |
| tree | e5a3bf9dd51357e5e87a08ac1b346c6fb8b35d69 /include/linux/clk-provider.h | |
| parent | 58a2b4c9bdf98452fec95bb1a5eeed60c01f621a (diff) | |
| download | lwn-d1c8a501ec07290da5cc2d8dedb6692cf89078d8.tar.gz lwn-d1c8a501ec07290da5cc2d8dedb6692cf89078d8.zip | |
clk: gate: add explicit big endian support
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian gated clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/linux/clk-provider.h')
| -rw-r--r-- | include/linux/clk-provider.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 7c6861995505..7d5a32d83655 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -349,6 +349,9 @@ void of_fixed_clk_setup(struct device_node *np); * of this register, and mask of gate bits are in higher 16-bit of this * register. While setting the gate bits, higher 16-bit should also be * updated to indicate changing gate bits. + * CLK_GATE_BIG_ENDIAN - by default little endian register accesses are used for + * the gate register. Setting this flag makes the register accesses big + * endian. */ struct clk_gate { struct clk_hw hw; @@ -362,6 +365,7 @@ struct clk_gate { #define CLK_GATE_SET_TO_DISABLE BIT(0) #define CLK_GATE_HIWORD_MASK BIT(1) +#define CLK_GATE_BIG_ENDIAN BIT(2) extern const struct clk_ops clk_gate_ops; struct clk *clk_register_gate(struct device *dev, const char *name, |