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author | Gabriel FERNANDEZ <gabriel.fernandez@st.com> | 2014-05-20 15:22:00 +0200 |
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committer | Maxime Coquelin <maxime.coquelin@st.com> | 2014-05-21 14:27:08 +0200 |
commit | ed3593f98603110e504c2552eed50c62233e648a (patch) | |
tree | 55b98421215217a92e5fc8f0a0dc9765043c2a0b /include/dt-bindings/clock/stih416-clks.h | |
parent | e92cc8810194504085423185e785a9577a41b65a (diff) | |
download | lwn-ed3593f98603110e504c2552eed50c62233e648a.tar.gz lwn-ed3593f98603110e504c2552eed50c62233e648a.zip |
ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysin
all-caps node name is not very usual.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'include/dt-bindings/clock/stih416-clks.h')
0 files changed, 0 insertions, 0 deletions