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authorChris Zankel <czankel@tensilica.com>2005-06-23 22:01:26 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-24 00:05:22 -0700
commit9a8fd5589902153a134111ed7a40f9cca1f83254 (patch)
tree6f7a06de25bdf0b2d94623794c2cbbc66b5a77f6 /include/asm-xtensa/scatterlist.h
parent3f65ce4d141e435e54c20ed2379d983d362a2cb5 (diff)
downloadlwn-9a8fd5589902153a134111ed7a40f9cca1f83254.tar.gz
lwn-9a8fd5589902153a134111ed7a40f9cca1f83254.zip
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa/scatterlist.h')
-rw-r--r--include/asm-xtensa/scatterlist.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/include/asm-xtensa/scatterlist.h b/include/asm-xtensa/scatterlist.h
new file mode 100644
index 000000000000..38a2b9acd658
--- /dev/null
+++ b/include/asm-xtensa/scatterlist.h
@@ -0,0 +1,34 @@
+/*
+ * include/asm-xtensa/scatterlist.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 - 2005 Tensilica Inc.
+ */
+
+#ifndef _XTENSA_SCATTERLIST_H
+#define _XTENSA_SCATTERLIST_H
+
+struct scatterlist {
+ struct page *page;
+ unsigned int offset;
+ dma_addr_t dma_address;
+ unsigned int length;
+};
+
+/*
+ * These macros should be used after a pci_map_sg call has been done
+ * to get bus addresses of each of the SG entries and their lengths.
+ * You should only work with the number of sg entries pci_map_sg
+ * returns, or alternatively stop on the first sg_dma_len(sg) which
+ * is 0.
+ */
+#define sg_dma_address(sg) ((sg)->dma_address)
+#define sg_dma_len(sg) ((sg)->length)
+
+
+#define ISA_DMA_THRESHOLD (~0UL)
+
+#endif /* _XTENSA_SCATTERLIST_H */