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authorSuresh Siddha <suresh.b.siddha@intel.com>2008-08-23 17:47:10 +0200
committerIngo Molnar <mingo@elte.hu>2008-08-23 17:47:10 +0200
commitbbb65d2d365efe9951290e61678dcf81ec60add4 (patch)
treef3eacf1b1313d729e084064ed6dda5db64522bf4 /include/asm-x86/processor.h
parent87ce786ae5f24e336195805a9fc7428a6f922478 (diff)
downloadlwn-bbb65d2d365efe9951290e61678dcf81ec60add4.tar.gz
lwn-bbb65d2d365efe9951290e61678dcf81ec60add4.zip
x86: use cpuid vector 0xb when available for detecting cpu topology
cpuid leaf 0xb provides extended topology enumeration. This interface provides the 32-bit x2APIC id of the logical processor and it also provides a new mechanism to detect SMT and core siblings (which provides increased addressability). Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/processor.h')
-rw-r--r--include/asm-x86/processor.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index 5f58da401b43..79338fe965d2 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -161,6 +161,7 @@ extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
extern unsigned short num_cache_leaves;
+extern void detect_extended_topology(struct cpuinfo_x86 *c);
#if defined(CONFIG_X86_HT) || defined(CONFIG_X86_64)
extern void detect_ht(struct cpuinfo_x86 *c);
#else