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authorThomas Gleixner <tglx@linutronix.de>2007-10-12 23:04:07 +0200
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>2007-10-12 23:04:07 +0200
commitfb79d22e1d4b06385796cc0db0084a2e07beccee (patch)
treef62b850b9b8ee1b7a4264b29e30fd7c360e23c94 /include/asm-x86/apic_64.h
parent4e77ae3e105d28aa9410585715d83818f0abe871 (diff)
downloadlwn-fb79d22e1d4b06385796cc0db0084a2e07beccee.tar.gz
lwn-fb79d22e1d4b06385796cc0db0084a2e07beccee.zip
x86: disable apic timer for AMD C1E enabled CPUs
AMDs C1E enabled CPUs stop the local apic timer, when both cores are idle. This is a hardware feature which breaks highres/dynticks. Add the same quirk as we have for 32 bit already. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Diffstat (limited to 'include/asm-x86/apic_64.h')
-rw-r--r--include/asm-x86/apic_64.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86/apic_64.h b/include/asm-x86/apic_64.h
index 81335e95365b..f32f654d1f96 100644
--- a/include/asm-x86/apic_64.h
+++ b/include/asm-x86/apic_64.h
@@ -19,6 +19,7 @@
extern int apic_verbosity;
extern int apic_runs_main_timer;
extern int ioapic_force;
+extern int disable_apic_timer;
/*
* Define the default level of output to be very little