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| author | Paul Mundt <lethal@linux-sh.org> | 2007-06-08 11:55:28 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2007-06-08 11:55:28 +0900 |
| commit | b9601c5e59dd25693345558a301e833741bf5874 (patch) | |
| tree | 992d8114b381354bc5e588766c065cc7728fe5df /include/asm-sh/cpu-sh2 | |
| parent | 33d63bd83bf9aa6b662a376a96b825acba721e8f (diff) | |
| download | lwn-b9601c5e59dd25693345558a301e833741bf5874.tar.gz lwn-b9601c5e59dd25693345558a301e833741bf5874.zip | |
sh: Kill off dead SH7604 support.
This was added during 2.5.x, but was never moved along. This
can easily be resurrected if someone has one they wish to work
with, but it's not worth keeping around in its current form.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/cpu-sh2')
| -rw-r--r-- | include/asm-sh/cpu-sh2/cache.h | 20 |
1 files changed, 2 insertions, 18 deletions
diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h index 20b9796842dc..f02ba7a672b2 100644 --- a/include/asm-sh/cpu-sh2/cache.h +++ b/include/asm-sh/cpu-sh2/cache.h @@ -12,23 +12,7 @@ #define L1_CACHE_SHIFT 4 -#if defined(CONFIG_CPU_SUBTYPE_SH7604) -#define CCR 0xfffffe92 /* Address of Cache Control Register */ - -#define CCR_CACHE_CE 0x01 /* Cache enable */ -#define CCR_CACHE_ID 0x02 /* Instruction Replacement disable */ -#define CCR_CACHE_OD 0x04 /* Data Replacement disable */ -#define CCR_CACHE_TW 0x08 /* Two-way mode */ -#define CCR_CACHE_CP 0x10 /* Cache purge */ - -#define CACHE_OC_ADDRESS_ARRAY 0x60000000 - -#define CCR_CACHE_ENABLE CCR_CACHE_CE -#define CCR_CACHE_INVALIDATE CCR_CACHE_CP -#define CCR_CACHE_ORA CCR_CACHE_TW -#define CCR_CACHE_WT 0x00 /* SH-2 is _always_ write-through */ - -#elif defined(CONFIG_CPU_SUBTYPE_SH7619) +#if defined(CONFIG_CPU_SUBTYPE_SH7619) #define CCR1 0xffffffec #define CCR CCR1 @@ -49,5 +33,5 @@ #define CCR_CACHE_ENABLE CCR_CACHE_CE #define CCR_CACHE_INVALIDATE CCR_CACHE_CF #endif -#endif /* __ASM_CPU_SH2_CACHE_H */ +#endif /* __ASM_CPU_SH2_CACHE_H */ |