diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2006-07-03 19:32:51 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-07-03 19:55:12 +1000 |
| commit | b9e5b4e6a991a5a6d521f2e20a65835404b4169f (patch) | |
| tree | a0ac972faae4bf9133f576d842667bb134190341 /include/asm-powerpc/mpic.h | |
| parent | 5a43a066b11ac2fe84cf67307f20b83bea390f83 (diff) | |
| download | lwn-b9e5b4e6a991a5a6d521f2e20a65835404b4169f.tar.gz lwn-b9e5b4e6a991a5a6d521f2e20a65835404b4169f.zip | |
[POWERPC] Use the genirq framework
This adapts the generic powerpc interrupt handling code, and all of
the platforms except for the embedded 6xx machines, to use the new
genirq framework.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/mpic.h')
| -rw-r--r-- | include/asm-powerpc/mpic.h | 25 |
1 files changed, 5 insertions, 20 deletions
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index f0d22ac34b96..a2277cb77ddc 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h @@ -114,9 +114,6 @@ #define MPIC_VEC_TIMER_1 248 #define MPIC_VEC_TIMER_0 247 -/* Type definition of the cascade handler */ -typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data); - #ifdef CONFIG_MPIC_BROKEN_U3 /* Fixup table entry */ struct mpic_irq_fixup @@ -133,9 +130,12 @@ struct mpic_irq_fixup struct mpic { /* The "linux" controller struct */ - hw_irq_controller hc_irq; + struct irq_chip hc_irq; +#ifdef CONFIG_MPIC_BROKEN_U3 + struct irq_chip hc_ht_irq; +#endif #ifdef CONFIG_SMP - hw_irq_controller hc_ipi; + struct irq_chip hc_ipi; #endif const char *name; /* Flags */ @@ -153,10 +153,6 @@ struct mpic unsigned int num_sources; /* Number of CPUs */ unsigned int num_cpus; - /* cascade handler */ - mpic_cascade_t cascade; - void *cascade_data; - unsigned int cascade_vec; /* senses array */ unsigned char *senses; unsigned int senses_count; @@ -237,17 +233,6 @@ extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, */ extern void mpic_init(struct mpic *mpic); -/* Setup a cascade. Currently, only one cascade is supported this - * way, though you can always do a normal request_irq() and add - * other cascades this way. You should call this _after_ having - * added all the ISUs - * - * @irq_no: "linux" irq number of the cascade (that is offset'ed vector) - * @handler: cascade handler function - */ -extern void mpic_setup_cascade(unsigned int irq_no, mpic_cascade_t hanlder, - void *data); - /* * All of the following functions must only be used after the * ISUs have been assigned and the controller fully initialized |