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authorJames Bottomley <jejb@parisc-linux.org>2006-09-09 12:36:25 -0700
committerMatthew Wilcox <willy@parisc-linux.org>2006-10-04 06:48:57 -0600
commit7085689ed135f94108e46c372015c6f5cd3372a3 (patch)
tree3bf6f7b50160fae8dd9f2b08a6bc0541500b5c63 /include/asm-parisc/irq.h
parent6e5dc42b5add25c94ce0e95da87122f91b4bfdb3 (diff)
downloadlwn-7085689ed135f94108e46c372015c6f5cd3372a3.tar.gz
lwn-7085689ed135f94108e46c372015c6f5cd3372a3.zip
[PARISC] Allow nested interrupts
Our prior mode of operation didn't allow nested interrupts because it makes the interrupt code much simpler. However, nested interrupts are better for latency. This code uses the EIEM register to simulate level interrupts and thus achieve nesting. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc/irq.h')
-rw-r--r--include/asm-parisc/irq.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
index 6e29cfa2812d..399c81981ed5 100644
--- a/include/asm-parisc/irq.h
+++ b/include/asm-parisc/irq.h
@@ -39,6 +39,8 @@ struct irq_chip;
*/
void no_ack_irq(unsigned int irq);
void no_end_irq(unsigned int irq);
+void cpu_ack_irq(unsigned int irq);
+void cpu_end_irq(unsigned int irq);
extern int txn_alloc_irq(unsigned int nbits);
extern int txn_claim_irq(int);