diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2005-05-05 16:45:59 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:31:12 +0100 |
| commit | 4194318c3941fa9cfaa63dfdab9054fcae5e08d3 (patch) | |
| tree | 2b44341a9cb911e34efbb33a35142fd2dcd536ff /include/asm-mips/cpu-features.h | |
| parent | cd21dfcfbb5c43de54f6be795dde07397da2bc2f (diff) | |
| download | lwn-4194318c3941fa9cfaa63dfdab9054fcae5e08d3.tar.gz lwn-4194318c3941fa9cfaa63dfdab9054fcae5e08d3.zip | |
Cleanup decoding of MIPSxx config registers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu-features.h')
| -rw-r--r-- | include/asm-mips/cpu-features.h | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 9a2de642eee6..012deda63e68 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -4,6 +4,7 @@ * for more details. * * Copyright (C) 2003, 2004 Ralf Baechle + * Copyright (C) 2004 Maciej W. Rozycki */ #ifndef __ASM_CPU_FEATURES_H #define __ASM_CPU_FEATURES_H @@ -39,9 +40,6 @@ #ifndef cpu_has_watch #define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH) #endif -#ifndef cpu_has_mips16 -#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16) -#endif #ifndef cpu_has_divec #define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC) #endif @@ -66,6 +64,18 @@ #ifndef cpu_has_llsc #define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC) #endif +#ifndef cpu_has_mips16 +#define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16) +#endif +#ifndef cpu_has_mdmx +#define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX) +#endif +#ifndef cpu_has_mips3d +#define cpu_has_mips3d (cpu_data[0].ases & MIPS_ASE_MIPS3D) +#endif +#ifndef cpu_has_smartmips +#define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS) +#endif #ifndef cpu_has_vtag_icache #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) #endif |