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author | Thomas Zimmermann <tzimmermann@suse.de> | 2022-07-28 14:40:57 +0200 |
---|---|---|
committer | Thomas Zimmermann <tzimmermann@suse.de> | 2022-07-29 16:01:46 +0200 |
commit | 5cd062e31d352e33284d08a52ddb2b9ed1a5caa8 (patch) | |
tree | 01038166ad908468ad36a3a47d38843fb63365d8 /drivers | |
parent | 1baf9127c482a3a58aef81d92ae751798e2db202 (diff) | |
download | lwn-5cd062e31d352e33284d08a52ddb2b9ed1a5caa8.tar.gz lwn-5cd062e31d352e33284d08a52ddb2b9ed1a5caa8.zip |
drm/mgag200: Set SCROFF in primary-plane code
The SCROFF bit controls reading the primary plane's scanout buffer
from video memory. Set it from primary-plane code, instead of CRTC
code.
v3:
* only flip SCROFF when enabling/disabling the plane (Jocelyn)
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Tested-by: Jocelyn Falempe <jfalempe@redhat.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728124103.30159-9-tzimmermann@suse.de
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/mgag200/mgag200_mode.c | 35 |
1 files changed, 20 insertions, 15 deletions
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 461da1409fdf..7536a9a41bd6 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -549,7 +549,7 @@ static void mgag200_g200ev_set_hiprilvl(struct mga_device *mdev) static void mgag200_enable_display(struct mga_device *mdev) { - u8 seq0, seq1, crtcext1; + u8 seq0, crtcext1; RREG_SEQ(0x00, seq0); seq0 |= MGAREG_SEQ0_SYNCRST | @@ -563,12 +563,6 @@ static void mgag200_enable_display(struct mga_device *mdev) mga_wait_vsync(mdev); mga_wait_busy(mdev); - RREG_SEQ(0x01, seq1); - seq1 &= ~MGAREG_SEQ1_SCROFF; - WREG_SEQ(0x01, seq1); - - msleep(20); - RREG_ECRT(0x01, crtcext1); crtcext1 &= ~MGAREG_CRTCEXT1_VSYNCOFF; crtcext1 &= ~MGAREG_CRTCEXT1_HSYNCOFF; @@ -577,7 +571,7 @@ static void mgag200_enable_display(struct mga_device *mdev) static void mgag200_disable_display(struct mga_device *mdev) { - u8 seq0, seq1, crtcext1; + u8 seq0, crtcext1; RREG_SEQ(0x00, seq0); seq0 &= ~MGAREG_SEQ0_SYNCRST; @@ -590,12 +584,6 @@ static void mgag200_disable_display(struct mga_device *mdev) mga_wait_vsync(mdev); mga_wait_busy(mdev); - RREG_SEQ(0x01, seq1); - seq1 |= MGAREG_SEQ1_SCROFF; - WREG_SEQ(0x01, seq1); - - msleep(20); - RREG_ECRT(0x01, crtcext1); crtcext1 |= MGAREG_CRTCEXT1_VSYNCOFF | MGAREG_CRTCEXT1_HSYNCOFF; @@ -673,6 +661,7 @@ static void mgag200_primary_plane_helper_atomic_update(struct drm_plane *plane, struct drm_framebuffer *fb = plane_state->fb; struct drm_atomic_helper_damage_iter iter; struct drm_rect damage; + u8 seq1; if (!fb) return; @@ -685,11 +674,27 @@ static void mgag200_primary_plane_helper_atomic_update(struct drm_plane *plane, /* Always scanout image at VRAM offset 0 */ mgag200_set_startadd(mdev, (u32)0); mgag200_set_offset(mdev, fb); + + if (!old_plane_state->crtc && plane_state->crtc) { // enabling + RREG_SEQ(0x01, seq1); + seq1 &= ~MGAREG_SEQ1_SCROFF; + WREG_SEQ(0x01, seq1); + msleep(20); + } } static void mgag200_primary_plane_helper_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *old_state) -{ } +{ + struct drm_device *dev = plane->dev; + struct mga_device *mdev = to_mga_device(dev); + u8 seq1; + + RREG_SEQ(0x01, seq1); + seq1 |= MGAREG_SEQ1_SCROFF; + WREG_SEQ(0x01, seq1); + msleep(20); +} static const struct drm_plane_helper_funcs mgag200_primary_plane_helper_funcs = { DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, |