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authorWim Van Sebroeck <wim@iguana.be>2010-03-08 11:02:38 +0000
committerWim Van Sebroeck <wim@iguana.be>2010-03-08 11:02:38 +0000
commit39f3be72c1a1b20d7e6e35717afa2ddb89259650 (patch)
treefd122f0f7fa47662e5b99c06f5c84ee851abef7a /drivers/watchdog/i6300esb.c
parentc1bf3acffcddcf794e3d8a1d25fb8bd4d5912383 (diff)
downloadlwn-39f3be72c1a1b20d7e6e35717afa2ddb89259650.tar.gz
lwn-39f3be72c1a1b20d7e6e35717afa2ddb89259650.zip
[WATCHDOG] i6300esb: fix unlock register with
Before you can read or write from the i6300esb memeory mapped registers, you need to unlock these. This is done by writing the magic numbers 0x80 and 0x86 to the reload register. The size of the reload register is 32bit though. Also binary 11 is hex 0x03 and not 0x11. Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog/i6300esb.c')
-rw-r--r--drivers/watchdog/i6300esb.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/watchdog/i6300esb.c b/drivers/watchdog/i6300esb.c
index 2fbe7fea7ee6..3e00dc5b5a20 100644
--- a/drivers/watchdog/i6300esb.c
+++ b/drivers/watchdog/i6300esb.c
@@ -65,7 +65,7 @@
/* Config register bits */
#define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
#define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
-#define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */
+#define ESB_WDT_INTTYPE (0x03 << 0) /* Interrupt type on timer1 timeout */
/* Reload register bits */
#define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */
@@ -111,8 +111,8 @@ MODULE_PARM_DESC(nowayout,
*/
static inline void esb_unlock_registers(void)
{
- writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
- writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
+ writew(ESB_UNLOCK1, ESB_RELOAD_REG);
+ writew(ESB_UNLOCK2, ESB_RELOAD_REG);
}
static int esb_timer_start(void)