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authorMichael Grzeschik <m.grzeschik@pengutronix.de>2010-03-23 13:35:49 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-24 16:31:22 -0700
commitb5c26f97ec4a17c650055c83cfc1f2ee6d8818eb (patch)
treed723b51966d039027bc600a40dd25c91011aa11f /drivers/video/geode
parent4fd2c20d964a8fb9861045f1022475c9d200d684 (diff)
downloadlwn-b5c26f97ec4a17c650055c83cfc1f2ee6d8818eb.tar.gz
lwn-b5c26f97ec4a17c650055c83cfc1f2ee6d8818eb.zip
lxfb: set the H- and V-SYNC polarity of the flatpanel output
Fixup for the flatpanel output. The geode_modedb attribute flags are used to set the SYNC polarity of the flatpanel. Without this patch our flatpanel registers stayed unconfigured, so we just saw garbage output. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Cc: Andres Salomon <dilinger@collabora.co.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/geode')
-rw-r--r--drivers/video/geode/lxfb.h2
-rw-r--r--drivers/video/geode/lxfb_ops.c10
2 files changed, 11 insertions, 1 deletions
diff --git a/drivers/video/geode/lxfb.h b/drivers/video/geode/lxfb.h
index cc781c00f75d..e4c4d89b7860 100644
--- a/drivers/video/geode/lxfb.h
+++ b/drivers/video/geode/lxfb.h
@@ -365,6 +365,8 @@ enum fp_registers {
FP_CRC, /* 0x458 */
};
+#define FP_PT2_HSP (1 << 22)
+#define FP_PT2_VSP (1 << 23)
#define FP_PT2_SCRC (1 << 27) /* shfclk free */
#define FP_PM_P (1 << 24) /* panel power ctl */
diff --git a/drivers/video/geode/lxfb_ops.c b/drivers/video/geode/lxfb_ops.c
index 0e5d8c7c3eba..bc35a95e59d4 100644
--- a/drivers/video/geode/lxfb_ops.c
+++ b/drivers/video/geode/lxfb_ops.c
@@ -274,7 +274,15 @@ static void lx_graphics_enable(struct fb_info *info)
u32 msrlo, msrhi;
write_fp(par, FP_PT1, 0);
- write_fp(par, FP_PT2, FP_PT2_SCRC);
+ temp = FP_PT2_SCRC;
+
+ if (info->var.sync & FB_SYNC_HOR_HIGH_ACT)
+ temp |= FP_PT2_HSP;
+
+ if (info->var.sync & FB_SYNC_VERT_HIGH_ACT)
+ temp |= FP_PT2_VSP;
+
+ write_fp(par, FP_PT2, temp);
write_fp(par, FP_DFC, FP_DFC_BC);
msrlo = MSR_LX_MSR_PADSEL_TFT_SEL_LOW;