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author | Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> | 2018-10-16 15:48:04 +0530 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-11-09 08:45:07 -0800 |
commit | b312f6f4ac84bcd9587fd24316b5de7c3f319b88 (patch) | |
tree | 6cb871e3a0e98e2c46620187b1a7430aa69df239 /drivers/tty/serial/fsl_lpuart.c | |
parent | 0379b1163e509cfc4c18643b27231c04c78981ab (diff) | |
download | lwn-b312f6f4ac84bcd9587fd24316b5de7c3f319b88.tar.gz lwn-b312f6f4ac84bcd9587fd24316b5de7c3f319b88.zip |
serial-uartlite: Fix the unbind path
Currently the clocks are not enabled at probe but when the port is used.
Remove the unconditional disable at remove.
Fixes the below
[ 77.660196] ------------[ cut here ]------------
[ 77.664749] WARNING: CPU: 0 PID: 1992 at drivers/clk/clk.c:622
clk_core_disable+0x78/0x80
[ 77.672892] Modules linked in:
[ 77.675930] CPU: 0 PID: 1992 Comm: sh Not tainted 4.14.0 #23
[ 77.681570] Hardware name: xlnx,zynqmp (DT)
[ 77.685736] task: ffffffc879e2e580 task.stack: ffffff800be30000
[ 77.691641] PC is at clk_core_disable+0x78/0x80
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/fsl_lpuart.c')
0 files changed, 0 insertions, 0 deletions