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authorMika Westerberg <mika.westerberg@linux.intel.com>2019-09-06 12:05:24 +0300
committerMika Westerberg <mika.westerberg@linux.intel.com>2019-11-01 14:31:59 +0300
commit778bfca3d14aa93d1e3062835061401b08c258f7 (patch)
tree879aa7c6b62695ced80097e79a569118adfad78a /drivers/thunderbolt/switch.c
parent8f57d47806664d9b2e618ea8086adcf76752daaf (diff)
downloadlwn-778bfca3d14aa93d1e3062835061401b08c258f7.tar.gz
lwn-778bfca3d14aa93d1e3062835061401b08c258f7.zip
thunderbolt: Convert PCIe adapter register names to follow the USB4 spec
Now that USB4 spec has names for these PCIe adapter registers we can use them instead. This makes it easier to match certain register to the spec. No functional changes. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/switch.c')
-rw-r--r--drivers/thunderbolt/switch.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c
index 9c2e739c79f3..7d05c858423b 100644
--- a/drivers/thunderbolt/switch.c
+++ b/drivers/thunderbolt/switch.c
@@ -803,10 +803,11 @@ bool tb_pci_port_is_enabled(struct tb_port *port)
{
u32 data;
- if (tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap, 1))
+ if (tb_port_read(port, &data, TB_CFG_PORT,
+ port->cap_adap + ADP_PCIE_CS_0, 1))
return false;
- return !!(data & TB_PCI_EN);
+ return !!(data & ADP_PCIE_CS_0_PE);
}
/**
@@ -816,10 +817,11 @@ bool tb_pci_port_is_enabled(struct tb_port *port)
*/
int tb_pci_port_enable(struct tb_port *port, bool enable)
{
- u32 word = enable ? TB_PCI_EN : 0x0;
+ u32 word = enable ? ADP_PCIE_CS_0_PE : 0x0;
if (!port->cap_adap)
return -ENXIO;
- return tb_port_write(port, &word, TB_CFG_PORT, port->cap_adap, 1);
+ return tb_port_write(port, &word, TB_CFG_PORT,
+ port->cap_adap + ADP_PCIE_CS_0, 1);
}
/**