summaryrefslogtreecommitdiff
path: root/drivers/spi/spi-pl022.c
diff options
context:
space:
mode:
authorVinit Shenoy <vinit.shenoy@st.com>2012-04-17 12:40:13 +0530
committerGrant Likely <grant.likely@secretlab.ca>2012-04-17 17:54:05 -0600
commiteb798c641a34ae9cee9fcacfbe5dd40bd7777607 (patch)
tree3cbd69ef2fc8ffae67160b9919548aa38c0af916 /drivers/spi/spi-pl022.c
parente816b57a337ea3b755de72bec38c10c864f23015 (diff)
downloadlwn-eb798c641a34ae9cee9fcacfbe5dd40bd7777607.tar.gz
lwn-eb798c641a34ae9cee9fcacfbe5dd40bd7777607.zip
spi/pl022: Fix range checking for bits per word
pl022 ssp controller supports word lengths from 4 to 16 (or 32) bits. Currently implemented checks were incorrect. It has following check if (pl022->vendor->max_bpw >= 32) which must be checking for <=. Also error print message is incorrect, that prints "range is from 1 to 16". Fix both these issues. Signed-off-by: Vinit Shenoy <vinit.shenoy@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/spi-pl022.c')
-rw-r--r--drivers/spi/spi-pl022.c25
1 files changed, 9 insertions, 16 deletions
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 09c925aaf320..1ead49dbebce 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -1823,9 +1823,12 @@ static int pl022_setup(struct spi_device *spi)
} else
chip->cs_control = chip_info->cs_control;
- if (bits <= 3) {
- /* PL022 doesn't support less than 4-bits */
+ /* Check bits per word with vendor specific range */
+ if ((bits <= 3) || (bits > pl022->vendor->max_bpw)) {
status = -ENOTSUPP;
+ dev_err(&spi->dev, "illegal data size for this controller!\n");
+ dev_err(&spi->dev, "This controller can only handle 4 <= n <= %d bit words\n",
+ pl022->vendor->max_bpw);
goto err_config_params;
} else if (bits <= 8) {
dev_dbg(&spi->dev, "4 <= n <=8 bits per word\n");
@@ -1838,20 +1841,10 @@ static int pl022_setup(struct spi_device *spi)
chip->read = READING_U16;
chip->write = WRITING_U16;
} else {
- if (pl022->vendor->max_bpw >= 32) {
- dev_dbg(&spi->dev, "17 <= n <= 32 bits per word\n");
- chip->n_bytes = 4;
- chip->read = READING_U32;
- chip->write = WRITING_U32;
- } else {
- dev_err(&spi->dev,
- "illegal data size for this controller!\n");
- dev_err(&spi->dev,
- "a standard pl022 can only handle "
- "1 <= n <= 16 bit words\n");
- status = -ENOTSUPP;
- goto err_config_params;
- }
+ dev_dbg(&spi->dev, "17 <= n <= 32 bits per word\n");
+ chip->n_bytes = 4;
+ chip->read = READING_U32;
+ chip->write = WRITING_U32;
}
/* Now Initialize all register settings required for this chip */