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| author | Serge Semin <Sergey.Semin@baikalelectronics.ru> | 2020-10-08 02:55:09 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-10-08 23:00:23 +0100 |
| commit | ca4e2ac20f938c372b83d1cb16ec00f7c89191df (patch) | |
| tree | 5dfb67ee9fea180f9077a70f77bd3e0d786026ee /drivers/spi/spi-cadence.c | |
| parent | abf00907538e21c469a10809dc2991982673fcbf (diff) | |
| download | lwn-ca4e2ac20f938c372b83d1cb16ec00f7c89191df.tar.gz lwn-ca4e2ac20f938c372b83d1cb16ec00f7c89191df.zip | |
spi: dw: Add Baikal-T1 SPI Controller bindings
These controllers are based on the DW APB SSI IP-core and embedded into
the SoC, so two of them are equipped with IRQ, DMA, 64 words FIFOs and 4
native CS, while another one as being utilized by the Baikal-T1 System
Boot Controller has got a very limited resources: no IRQ, no DMA, only a
single native chip-select and just 8 bytes Tx/Rx FIFOs available. That's
why we have to mark the IRQ to be optional for the later interface.
The SPI controller embedded into the Baikal-T1 System Boot Controller can
be also used to directly access an external SPI flash by means of a
dedicated FSM. The corresponding MMIO region availability is switchable by
the embedded multiplexor, which phandle can be specified in the dts node.
* We added a new example to test out the non-standard Baikal-T1 System
Boot SPI Controller DT binding.
Co-developed-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Signed-off-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201007235511.4935-21-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-cadence.c')
0 files changed, 0 insertions, 0 deletions