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authorLinus Torvalds <torvalds@linux-foundation.org>2018-10-23 01:26:05 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2018-10-23 01:26:05 +0100
commitb537149a2fb45ef9936b7a55aa801fbab8ea2a8a (patch)
treeb0e53f0805bb5f943b8307d4389792ae24482883 /drivers/spi/spi-bcm-qspi.c
parent6214a9fe2aeca5e22184b20954774424e2efc1f6 (diff)
parent7b9734dbc5b042bb8d8d930797f346b280057c4e (diff)
downloadlwn-b537149a2fb45ef9936b7a55aa801fbab8ea2a8a.tar.gz
lwn-b537149a2fb45ef9936b7a55aa801fbab8ea2a8a.zip
Merge tag 'spi-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "One new core feature here, a small collection of new drivers and a bunch of small improvements in existing drivers: - A new CS_WORD flag for transfers where the chip select is toggled at every word, with both a generic implementation and the ability for controllers to do this automatically (including a DaVinci one). - New drivers for Mediatek MT2712, Qualcomm GENI and QSPI, Spreadtrum SPI and ST STM32 QSPI plus new IDs for several existing ones" * tag 'spi-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (86 commits) spi: lpspi: add imx8qxp compatible string spi: Allow building SPI_BCM63XX_HSSPI on ARM-based SoCs spi: omap2-mcspi: Add slave mode support spi: omap2-mcspi: Set FIFO DMA trigger level to word length spi: omap2-mcspi: Switch to readl_poll_timeout() spi: spi-mem: add stm32 qspi controller dt-bindings: spi: add stm32 qspi controller spi: sh-msiof: document R8A779{7|8}0 bindings spi: pic32-sqi: don't pass GFP_DMA32 to dma_alloc_coherent MAINTAINERS: Add entry for Broadcom SPI controller spi: sh-msiof: fix deferred probing spi: imx: use PIO mode if size is small spi: imx: correct wml as the last sg length spi: imx: move wml setting to later than setup_transfer PCI: Provide pci_match_id() with CONFIG_PCI=n spi: Make GPIO CSs honour the SPI_NO_CS flag spi/spi-pxa2xx: add PXA2xx SSP SPI Controller spi: pxa2xx: Add devicetree support spi: pxa2xx: Use an enum for type spi: spi-geni-qcom: Add SPI driver support for GENI based QUP ...
Diffstat (limited to 'drivers/spi/spi-bcm-qspi.c')
-rw-r--r--drivers/spi/spi-bcm-qspi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c
index 8612525fa4e3..584bcb018a62 100644
--- a/drivers/spi/spi-bcm-qspi.c
+++ b/drivers/spi/spi-bcm-qspi.c
@@ -89,7 +89,7 @@
#define BSPI_BPP_MODE_SELECT_MASK BIT(8)
#define BSPI_BPP_ADDR_SELECT_MASK BIT(16)
-#define BSPI_READ_LENGTH 512
+#define BSPI_READ_LENGTH 256
/* MSPI register offsets */
#define MSPI_SPCR0_LSB 0x000
@@ -355,7 +355,7 @@ static int bcm_qspi_bspi_set_flex_mode(struct bcm_qspi *qspi,
int bpc = 0, bpp = 0;
u8 command = op->cmd.opcode;
int width = op->cmd.buswidth ? op->cmd.buswidth : SPI_NBITS_SINGLE;
- int addrlen = op->addr.nbytes * 8;
+ int addrlen = op->addr.nbytes;
int flex_mode = 1;
dev_dbg(&qspi->pdev->dev, "set flex mode w %x addrlen %x hp %d\n",