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authorGabriel Fernandez <gabriel.fernandez@st.com>2018-03-19 08:25:51 +0100
committerPhilipp Zabel <p.zabel@pengutronix.de>2018-03-27 10:44:04 +0200
commit197858b68532d415f21a5a92fb6661c67c6c9a97 (patch)
tree9124944c191c4072b49588713362340dc88094a8 /drivers/reset/Kconfig
parentdae5af9762c8f03233b68401ecc4fab4befae11c (diff)
downloadlwn-197858b68532d415f21a5a92fb6661c67c6c9a97.tar.gz
lwn-197858b68532d415f21a5a92fb6661c67c6c9a97.zip
reset: stm32mp1: Enable stm32mp1 reset driver
stm32mp1 RCC IP 1 has a reset SET register and a reset CLEAR register. Writing '0' on reset SET register has no effect Writing '1' on reset SET register activates the reset of the corresponding peripheral Writing '0' on reset CLEAR register has no effect Writing '1' on reset CLEAR register releases the reset of the corresponding peripheral See Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/reset/Kconfig')
-rw-r--r--drivers/reset/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 1efbc6cc8021..c0b292be1b72 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -97,6 +97,12 @@ config RESET_SIMPLE
- Allwinner SoCs
- ZTE's zx2967 family
+config RESET_STM32MP157
+ bool "STM32MP157 Reset Driver" if COMPILE_TEST
+ default MACH_STM32MP157
+ help
+ This enables the RCC reset controller driver for STM32 MPUs.
+
config RESET_SUNXI
bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
default ARCH_SUNXI