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authorTyler Baicar <tbaicar@codeaurora.org>2017-06-21 12:17:13 -0600
committerWill Deacon <will.deacon@arm.com>2017-06-22 18:22:05 +0100
commite9279e83ad1f4b5af541a522a81888f828210b40 (patch)
treea6ef3e7defd8a432b9df29877400084e2a4243b1 /drivers/ras
parent297b64c74385fc7ea5dfff66105ab6465f2df49a (diff)
downloadlwn-e9279e83ad1f4b5af541a522a81888f828210b40.tar.gz
lwn-e9279e83ad1f4b5af541a522a81888f828210b40.zip
trace, ras: add ARM processor error trace event
Currently there are trace events for the various RAS errors with the exception of ARM processor type errors. Add a new trace event for such errors so that the user will know when they occur. These trace events are consistent with the ARM processor error section type defined in UEFI 2.6 spec section N.2.4.4. Signed-off-by: Tyler Baicar <tbaicar@codeaurora.org> Acked-by: Steven Rostedt <rostedt@goodmis.org> Reviewed-by: Xie XiuQi <xiexiuqi@huawei.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/ras')
-rw-r--r--drivers/ras/ras.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/ras/ras.c b/drivers/ras/ras.c
index e87fd9e32ee2..39701a5c3f49 100644
--- a/drivers/ras/ras.c
+++ b/drivers/ras/ras.c
@@ -20,6 +20,11 @@ void log_non_standard_event(const uuid_le *sec_type, const uuid_le *fru_id,
trace_non_standard_event(sec_type, fru_id, fru_text, sev, err, len);
}
+void log_arm_hw_error(struct cper_sec_proc_arm *err)
+{
+ trace_arm_event(err);
+}
+
static int __init ras_init(void)
{
int rc = 0;
@@ -36,6 +41,7 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(extlog_mem_event);
#endif
EXPORT_TRACEPOINT_SYMBOL_GPL(mc_event);
EXPORT_TRACEPOINT_SYMBOL_GPL(non_standard_event);
+EXPORT_TRACEPOINT_SYMBOL_GPL(arm_event);
int __init parse_ras_param(char *str)
{