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| author | David Rivshin <drivshin@allworx.com> | 2016-01-29 23:26:53 -0500 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2016-03-23 17:11:47 +0100 |
| commit | 7b0883f33809ff0aeca9848193c31629a752bb77 (patch) | |
| tree | 2c3a38a5419fa19b716d5aad77a48702257dc30a /drivers/pwm/pwm-omap-dmtimer.c | |
| parent | cd378881426379a62a7fe67f34b8cbe738302022 (diff) | |
| download | lwn-7b0883f33809ff0aeca9848193c31629a752bb77.tar.gz lwn-7b0883f33809ff0aeca9848193c31629a752bb77.zip | |
pwm: omap-dmtimer: Round load and match values rather than truncate
When converting period and duty_cycle from nanoseconds to fclk cycles,
the error introduced by the integer division can be appreciable, especially
in the case of slow fclk or short period. Use DIV_ROUND_CLOSEST_ULL() so
that the error is kept to +/- 0.5 clock cycles.
Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-omap-dmtimer.c')
| -rw-r--r-- | drivers/pwm/pwm-omap-dmtimer.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/pwm/pwm-omap-dmtimer.c b/drivers/pwm/pwm-omap-dmtimer.c index 54641e45f45b..e0679eb399f6 100644 --- a/drivers/pwm/pwm-omap-dmtimer.c +++ b/drivers/pwm/pwm-omap-dmtimer.c @@ -49,11 +49,7 @@ to_pwm_omap_dmtimer_chip(struct pwm_chip *chip) static u32 pwm_omap_dmtimer_get_clock_cycles(unsigned long clk_rate, int ns) { - u64 c = (u64)clk_rate * ns; - - do_div(c, NSEC_PER_SEC); - - return c; + return DIV_ROUND_CLOSEST_ULL((u64)clk_rate * ns, NSEC_PER_SEC); } static void pwm_omap_dmtimer_start(struct pwm_omap_dmtimer_chip *omap) |