diff options
author | Vincent Cheng <vincent.cheng.xh@renesas.com> | 2020-01-07 09:47:57 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2020-01-07 13:51:23 -0800 |
commit | 1ece2fbe9b427d379455f18a874bcd3ab86a2419 (patch) | |
tree | 8e01b9f16e4707e42f72bd827ed06af8a84a7412 /drivers/ptp | |
parent | 4addbcb387c9519b320a9411cad68f0c01e9ed4b (diff) | |
download | lwn-1ece2fbe9b427d379455f18a874bcd3ab86a2419.tar.gz lwn-1ece2fbe9b427d379455f18a874bcd3ab86a2419.zip |
ptp: clockmatrix: Rework clockmatrix version information.
Simplify and fix the version information displayed by the driver.
The new info better relects what is needed to support the hardware.
Prev:
Version: 4.8.0, Pipeline 22169 0x4001, Rev 0, Bond 5, CSR 311, IRQ 2
New:
Version: 4.8.0, Id: 0x4001 Hw Rev: 5 OTP Config Select: 15
- Remove pipeline, CSR and IRQ because version x.y.z already incorporates
this information.
- Remove bond number because it is not used.
- Remove rev number because register was not implemented, always 0
- Add HW Rev ID register to replace rev number
- Add OTP config select to show the user configuration chosen by
the configurable GPIO pins on start-up
Signed-off-by: Vincent Cheng <vincent.cheng.xh@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/ptp')
-rw-r--r-- | drivers/ptp/idt8a340_reg.h | 2 | ||||
-rw-r--r-- | drivers/ptp/ptp_clockmatrix.c | 77 |
2 files changed, 15 insertions, 64 deletions
diff --git a/drivers/ptp/idt8a340_reg.h b/drivers/ptp/idt8a340_reg.h index 9263bc33b8f4..69eedda9f731 100644 --- a/drivers/ptp/idt8a340_reg.h +++ b/drivers/ptp/idt8a340_reg.h @@ -77,6 +77,8 @@ #define JTAG_DEVICE_ID 0x001c #define PRODUCT_ID 0x001e +#define OTP_SCSR_CONFIG_SELECT 0x0022 + #define STATUS 0xc03c #define USER_GPIO0_TO_7_STATUS 0x008a #define USER_GPIO8_TO_15_STATUS 0x008b diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c index e85836715f0b..032e112c3dd9 100644 --- a/drivers/ptp/ptp_clockmatrix.c +++ b/drivers/ptp/ptp_clockmatrix.c @@ -405,6 +405,7 @@ static int _idtcm_set_dpll_tod(struct idtcm_channel *channel, if (wr_trig == HW_TOD_WR_TRIG_SEL_MSB) { if (idtcm->calculate_overhead_flag) { + /* Assumption: I2C @ 400KHz */ total_overhead_ns = ktime_to_ns(ktime_get_raw() - idtcm->start_time) + idtcm->tod_write_overhead_ns @@ -596,44 +597,7 @@ static int idtcm_state_machine_reset(struct idtcm *idtcm) static int idtcm_read_hw_rev_id(struct idtcm *idtcm, u8 *hw_rev_id) { - return idtcm_read(idtcm, - GENERAL_STATUS, - HW_REV_ID, - hw_rev_id, - sizeof(u8)); -} - -static int idtcm_read_bond_id(struct idtcm *idtcm, u8 *bond_id) -{ - return idtcm_read(idtcm, - GENERAL_STATUS, - BOND_ID, - bond_id, - sizeof(u8)); -} - -static int idtcm_read_hw_csr_id(struct idtcm *idtcm, u16 *hw_csr_id) -{ - int err; - u8 buf[2] = {0}; - - err = idtcm_read(idtcm, GENERAL_STATUS, HW_CSR_ID, buf, sizeof(buf)); - - *hw_csr_id = (buf[1] << 8) | buf[0]; - - return err; -} - -static int idtcm_read_hw_irq_id(struct idtcm *idtcm, u16 *hw_irq_id) -{ - int err; - u8 buf[2] = {0}; - - err = idtcm_read(idtcm, GENERAL_STATUS, HW_IRQ_ID, buf, sizeof(buf)); - - *hw_irq_id = (buf[1] << 8) | buf[0]; - - return err; + return idtcm_read(idtcm, HW_REVISION, REV_ID, hw_rev_id, sizeof(u8)); } static int idtcm_read_product_id(struct idtcm *idtcm, u16 *product_id) @@ -674,20 +638,11 @@ static int idtcm_read_hotfix_release(struct idtcm *idtcm, u8 *hotfix) sizeof(u8)); } -static int idtcm_read_pipeline(struct idtcm *idtcm, u32 *pipeline) +static int idtcm_read_otp_scsr_config_select(struct idtcm *idtcm, + u8 *config_select) { - int err; - u8 buf[4] = {0}; - - err = idtcm_read(idtcm, - GENERAL_STATUS, - PIPELINE_ID, - &buf[0], - sizeof(buf)); - - *pipeline = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; - - return err; + return idtcm_read(idtcm, GENERAL_STATUS, OTP_SCSR_CONFIG_SELECT, + config_select, sizeof(u8)); } static int process_pll_mask(struct idtcm *idtcm, u32 addr, u8 val, u8 *mask) @@ -1078,28 +1033,22 @@ static void idtcm_display_version_info(struct idtcm *idtcm) u8 major; u8 minor; u8 hotfix; - u32 pipeline; u16 product_id; - u16 csr_id; - u16 irq_id; u8 hw_rev_id; - u8 bond_id; + u8 config_select; + char *fmt = "%d.%d.%d, Id: 0x%04x HW Rev: %d OTP Config Select: %d\n"; idtcm_read_major_release(idtcm, &major); idtcm_read_minor_release(idtcm, &minor); idtcm_read_hotfix_release(idtcm, &hotfix); - idtcm_read_pipeline(idtcm, &pipeline); idtcm_read_product_id(idtcm, &product_id); idtcm_read_hw_rev_id(idtcm, &hw_rev_id); - idtcm_read_bond_id(idtcm, &bond_id); - idtcm_read_hw_csr_id(idtcm, &csr_id); - idtcm_read_hw_irq_id(idtcm, &irq_id); - - dev_info(&idtcm->client->dev, "Version: %d.%d.%d, Pipeline %u\t" - "0x%04x, Rev %d, Bond %d, CSR %d, IRQ %d\n", - major, minor, hotfix, pipeline, - product_id, hw_rev_id, bond_id, csr_id, irq_id); + + idtcm_read_otp_scsr_config_select(idtcm, &config_select); + + dev_info(&idtcm->client->dev, fmt, major, minor, hotfix, + product_id, hw_rev_id, config_select); } static const struct ptp_clock_info idtcm_caps = { |