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author | Icenowy Zheng <icenowy@aosc.xyz> | 2016-08-23 13:58:25 +0800 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2016-08-23 12:28:31 +0200 |
commit | 486095fae3a8a6b1ae07c51844699d9bd5cfbebc (patch) | |
tree | 822a00d9e21c0476b222dfca456c48facec299a6 /drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | |
parent | bcb48cca23ec9852739e4a464307fa29515bbe48 (diff) | |
download | lwn-486095fae3a8a6b1ae07c51844699d9bd5cfbebc.tar.gz lwn-486095fae3a8a6b1ae07c51844699d9bd5cfbebc.zip |
pinctrl: sunxi: fix uart1 CTS/RTS pins at PG on A23/A33
PG8, PG9 is said to be the CTS/RTS pins for UART1 according to the A23/33
datasheets. However, the function is wrongly named "uart2" in the pinctrl
driver. This patch fixes this by modifying them to be named "uart1".
Cc: stable@vger.kernel.org
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c')
-rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c index ce483b03a263..f9d661e5c14a 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c @@ -485,12 +485,12 @@ static const struct sunxi_desc_pin sun8i_a23_pins[] = { SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), - SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ + SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 8)), /* PG_EINT8 */ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), - SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ + SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 9)), /* PG_EINT9 */ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), SUNXI_FUNCTION(0x0, "gpio_in"), |