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| author | Hongzhou Yang <hongzhou.yang@mediatek.com> | 2015-05-18 23:11:17 -0700 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-05-19 11:16:17 +0200 |
| commit | fc59e66c4284a420f9a1b3a0f99f784847bf3ef8 (patch) | |
| tree | b5be264541f57953f5fc9e83a74242b9f177129e /drivers/pinctrl/mediatek/pinctrl-mtk-common.c | |
| parent | 25d76b21b1b959b37520931fb6c4b8319a021705 (diff) | |
| download | lwn-fc59e66c4284a420f9a1b3a0f99f784847bf3ef8.tar.gz lwn-fc59e66c4284a420f9a1b3a0f99f784847bf3ef8.zip | |
pinctrl: mediatek: Add Pinctrl/GPIO driver for mt6397.
Add mt6397 support using mediatek common pinctrl driver.
mt6397 is a PMIC, and pinctrl/GPIO is part of 6397 chip.
Pinctrl/GPIO driver should obtain regmap from PMIC,
so adding this support to common code.
Also, mt6397 is no need to support interrupt controller,
so changing common code to skip it.
Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/mediatek/pinctrl-mtk-common.c')
| -rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index 36f89207d277..cd227295c2e6 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -1207,7 +1207,8 @@ static struct pinctrl_desc mtk_pctrl_desc = { }; int mtk_pctrl_init(struct platform_device *pdev, - const struct mtk_pinctrl_devdata *data) + const struct mtk_pinctrl_devdata *data, + struct regmap *regmap) { struct pinctrl_pin_desc *pins; struct mtk_pinctrl *pctl; @@ -1233,6 +1234,11 @@ int mtk_pctrl_init(struct platform_device *pdev, pctl->regmap1 = syscon_node_to_regmap(node); if (IS_ERR(pctl->regmap1)) return PTR_ERR(pctl->regmap1); + } else if (regmap) { + pctl->regmap1 = regmap; + } else { + dev_err(&pdev->dev, "Pinctrl node has not register regmap.\n"); + return -EINVAL; } /* Only 8135 has two base addr, other SoCs have only one. */ @@ -1278,7 +1284,7 @@ int mtk_pctrl_init(struct platform_device *pdev, pctl->chip->ngpio = pctl->devdata->npins; pctl->chip->label = dev_name(&pdev->dev); pctl->chip->dev = &pdev->dev; - pctl->chip->base = 0; + pctl->chip->base = -1; ret = gpiochip_add(pctl->chip); if (ret) { @@ -1294,6 +1300,9 @@ int mtk_pctrl_init(struct platform_device *pdev, goto chip_error; } + if (of_find_property(np, "interrupt-controller", NULL)) + return 0; + /* Get EINT register base from dts. */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { |