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| author | Daniel Machon <daniel.machon@microchip.com> | 2023-04-17 20:03:35 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-05-08 17:13:01 +0530 |
| commit | 7a503071e06db4409b7066b8ecca9f3da03dd3b1 (patch) | |
| tree | fcc947c5881835ce1424be9bb39998468d2ff078 /drivers/phy | |
| parent | 2db7289f59987a97160f8fadfe5aaece325f610b (diff) | |
| download | lwn-7a503071e06db4409b7066b8ecca9f3da03dd3b1.tar.gz lwn-7a503071e06db4409b7066b8ecca9f3da03dd3b1.zip | |
phy: sparx5-serdes: add skip_cmu_cfg check when configuring lanes
Add a check for skip_cmu_cfg when configuring the serdes lane. All
individual serdeses are reset upon first configuration. Resetting the
serdes involves reconfiguring it with preset values. The serdesmode is
required to determine the clock-providing CMU, therefore make sure the
serdes is not reconfigured if the serdesmode is not set.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-8-daniel.machon@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/microchip/sparx5_serdes.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/phy/microchip/sparx5_serdes.c b/drivers/phy/microchip/sparx5_serdes.c index eb9352d1de7e..01bd5ea620c5 100644 --- a/drivers/phy/microchip/sparx5_serdes.c +++ b/drivers/phy/microchip/sparx5_serdes.c @@ -1646,6 +1646,10 @@ static int sparx5_sd10g28_apply_params(struct sparx5_serdes_macro *macro, u32 value, cmu_idx; int err; + /* Do not configure serdes if CMU is not to be configured too */ + if (params->skip_cmu_cfg) + return 0; + cmu_idx = sparx5_serdes_cmu_get(params->cmu_sel, lane_index); err = sparx5_cmu_cfg(priv, cmu_idx); if (err) @@ -2111,6 +2115,7 @@ static int sparx5_sd10g28_config(struct sparx5_serdes_macro *macro, bool reset) .rxinvert = 1, .txswing = 240, .reg_rst = reset, + .skip_cmu_cfg = reset, }; int err; |