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| author | Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> | 2020-06-29 15:00:53 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2020-06-29 18:48:00 +0530 |
| commit | 4a33bea003144e217d8a3ae666f171dfc2e97bd6 (patch) | |
| tree | 13089a517c27bdd3e448041fd6e463d45d0ba65d /drivers/phy/xilinx/Kconfig | |
| parent | cea0f76a483d1270ac6f6513964e3e75193dda48 (diff) | |
| download | lwn-4a33bea003144e217d8a3ae666f171dfc2e97bd6.tar.gz lwn-4a33bea003144e217d8a3ae666f171dfc2e97bd6.zip | |
phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver
Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the
high speed peripherals such as USB, SATA, PCIE, Display Port and
Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This
patch adds driver for that ZynqMP GT core.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/xilinx/Kconfig')
| -rw-r--r-- | drivers/phy/xilinx/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/phy/xilinx/Kconfig b/drivers/phy/xilinx/Kconfig new file mode 100644 index 000000000000..d8b0d46b2b4d --- /dev/null +++ b/drivers/phy/xilinx/Kconfig @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0-only + +# +# PHY drivers for Xilinx platforms +# + +config PHY_XILINX_ZYNQMP + tristate "Xilinx ZynqMP PHY driver" + depends on ARCH_ZYNQMP || COMPILE_TEST + select GENERIC_PHY + help + Enable this to support ZynqMP High Speed Gigabit Transceiver + that is part of ZynqMP SoC. |