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authorAmelie Delaunay <amelie.delaunay@foss.st.com>2021-01-05 10:05:20 +0100
committerVinod Koul <vkoul@kernel.org>2021-01-13 20:40:21 +0530
commit00a9f71760376749e0857b43a8573803b1a075dc (patch)
treea7a89d7d7c5be541202ea25498ac32819f9d7553 /drivers/phy/st
parent34168172eb9f8e444caa843eca59813e60379f91 (diff)
downloadlwn-00a9f71760376749e0857b43a8573803b1a075dc.tar.gz
lwn-00a9f71760376749e0857b43a8573803b1a075dc.zip
dt-bindings: phy: phy-stm32-usbphyc: move PLL supplies to parent node
PLL block requires to be powered with 1v1 and 1v8 supplies to catch ENABLE signal. Currently, supplies are managed through phy_ops .power_on/off, and PLL activation/deactivation is managed through phy_ops .init/exit. The sequence of phy_ops .power_on/.phy_init, .power_off/.exit is USB drivers dependent. To ensure a good behavior of the PLL, supplies have to be managed at PLL activation/deactivation. That means the supplies need to be put in usbphyc parent node and not in phy children nodes. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210105090525.23164-2-amelie.delaunay@foss.st.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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