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authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>2018-09-05 18:49:45 +0900
committerKishon Vijay Abraham I <kishon@ti.com>2018-09-25 16:10:07 +0530
commitc6d9b132415951a8e8025a5b0e7f6b805737528c (patch)
tree6b79f2efaf4f6d8be7f19c98934940fad4322abc /drivers/phy/socionext/Kconfig
parent74c60cd96b5c8b63be69881fa7da514eae240744 (diff)
downloadlwn-c6d9b132415951a8e8025a5b0e7f6b805737528c.tar.gz
lwn-c6d9b132415951a8e8025a5b0e7f6b805737528c.zip
phy: socionext: add PCIe PHY driver support
Add a driver for PHY interface built into PCIe controller implemented in UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy/socionext/Kconfig')
-rw-r--r--drivers/phy/socionext/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/phy/socionext/Kconfig b/drivers/phy/socionext/Kconfig
index 497ca3821452..467e8147972b 100644
--- a/drivers/phy/socionext/Kconfig
+++ b/drivers/phy/socionext/Kconfig
@@ -23,3 +23,12 @@ config PHY_UNIPHIER_USB3
help
Enable this to support USB PHY implemented in USB3 controller
on UniPhier SoCs. This controller supports USB3.0 and lower speed.
+
+config PHY_UNIPHIER_PCIE
+ tristate "Uniphier PHY driver for PCIe controller"
+ depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
+ default PCIE_UNIPHIER
+ select GENERIC_PHY
+ help
+ Enable this to support PHY implemented in PCIe controller
+ on UniPhier SoCs. This driver supports LD20 and PXs3 SoCs.