diff options
| author | Chanho Park <chanho61.park@samsung.com> | 2022-07-06 11:02:53 +0900 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2022-07-08 10:38:59 +0530 |
| commit | 8d5bb683d50a80edaf8a6db9bfa28864914f5947 (patch) | |
| tree | 07c4b945b806717d0051c8ccb8943044acf94602 /drivers/phy/samsung/phy-exynosautov9-ufs.c | |
| parent | c1ab64aaacd61be70af26c711aa08345ff84f166 (diff) | |
| download | lwn-8d5bb683d50a80edaf8a6db9bfa28864914f5947.tar.gz lwn-8d5bb683d50a80edaf8a6db9bfa28864914f5947.zip | |
phy: samsung-ufs: convert phy clk usage to clk_bulk API
Instead of using separated clock manipulation, this converts the phy
clock usage to be clk_bulk APIs. By using this, we can completely
remove has_symbol_clk check and symbol clk variables.
Furthermore, clk_get should be moved to probe because there is no need
to get them in the phy_init callback.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220706020255.151177-2-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/samsung/phy-exynosautov9-ufs.c')
| -rw-r--r-- | drivers/phy/samsung/phy-exynosautov9-ufs.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/phy/samsung/phy-exynosautov9-ufs.c b/drivers/phy/samsung/phy-exynosautov9-ufs.c index 2b256070d657..49e2bcbef0b4 100644 --- a/drivers/phy/samsung/phy-exynosautov9-ufs.c +++ b/drivers/phy/samsung/phy-exynosautov9-ufs.c @@ -57,6 +57,10 @@ static const struct samsung_ufs_phy_cfg *exynosautov9_ufs_phy_cfgs[CFG_TAG_MAX] [CFG_PRE_PWR_HS] = exynosautov9_pre_pwr_hs_cfg, }; +static const char * const exynosautov9_ufs_phy_clks[] = { + "ref_clk", +}; + const struct samsung_ufs_phy_drvdata exynosautov9_ufs_phy = { .cfgs = exynosautov9_ufs_phy_cfgs, .isol = { @@ -64,6 +68,7 @@ const struct samsung_ufs_phy_drvdata exynosautov9_ufs_phy = { .mask = EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_MASK, .en = EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_EN, }, - .has_symbol_clk = 0, + .clk_list = exynosautov9_ufs_phy_clks, + .num_clks = ARRAY_SIZE(exynosautov9_ufs_phy_clks), .cdr_lock_status_offset = EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS, }; |