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| author | Abel Vesa <abel.vesa@linaro.org> | 2023-02-08 20:00:16 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-02-10 22:28:00 +0530 |
| commit | d38360e12fbc1b41ae6a2a243ce0b01ce27e5cab (patch) | |
| tree | 79d6b10a49cee87c4e8a945e237f801304fcbd11 /drivers/phy/qualcomm/phy-qcom-qmp.h | |
| parent | cea3e9435e63237aa010e5868f9a38cfccec89f1 (diff) | |
| download | lwn-d38360e12fbc1b41ae6a2a243ce0b01ce27e5cab.tar.gz lwn-d38360e12fbc1b41ae6a2a243ce0b01ce27e5cab.zip | |
phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new lane shared PCIE specific offsets in a dedicated
header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-8-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/qualcomm/phy-qcom-qmp.h')
| -rw-r--r-- | drivers/phy/qualcomm/phy-qcom-qmp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index e5974e6caf51..148663ee713a 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -24,6 +24,7 @@ #include "phy-qcom-qmp-qserdes-com-v6.h" #include "phy-qcom-qmp-qserdes-txrx-v6.h" #include "phy-qcom-qmp-qserdes-txrx-v6_20.h" +#include "phy-qcom-qmp-qserdes-ln-shrd-v6.h" #include "phy-qcom-qmp-qserdes-pll.h" |