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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-11-10 22:22:43 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-01-12 22:48:42 +0530 |
| commit | 5db2264006dd43fb212ad542520389ce5cb465d1 (patch) | |
| tree | fec2bc7d056e88422c24c9eeecef6df4aff2825e /drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h | |
| parent | 3b4bf465dd34d57cec2b1757d1e2b2395fe08f6a (diff) | |
| download | lwn-5db2264006dd43fb212ad542520389ce5cb465d1.tar.gz lwn-5db2264006dd43fb212ad542520389ce5cb465d1.zip | |
phy: qcom-qmp-ufs: rename regs layout arrays
Rename regs layouts to follow the QMP PHY version.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221110192248.873973-9-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h')
| -rw-r--r-- | drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h index bcca23493b7e..43255e8bf038 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h @@ -8,6 +8,9 @@ #define QCOM_PHY_QMP_PCS_UFS_V5_H_ /* Only for QMP V5 PHY - UFS PCS registers */ +#define QPHY_V5_PCS_UFS_PHY_START 0x000 +#define QPHY_V5_PCS_UFS_POWER_DOWN_CONTROL 0x004 +#define QPHY_V5_PCS_UFS_SW_RESET 0x008 #define QPHY_V5_PCS_UFS_TIMER_20US_CORECLK_STEPS_MSB 0x00c #define QPHY_V5_PCS_UFS_TIMER_20US_CORECLK_STEPS_LSB 0x010 #define QPHY_V5_PCS_UFS_PLL_CNTL 0x02c @@ -21,6 +24,7 @@ #define QPHY_V5_PCS_UFS_RX_SIGDET_CTRL2 0x158 #define QPHY_V5_PCS_UFS_TX_PWM_GEAR_BAND 0x160 #define QPHY_V5_PCS_UFS_TX_HS_GEAR_BAND 0x168 +#define QPHY_V5_PCS_UFS_READY_STATUS 0x180 #define QPHY_V5_PCS_UFS_TX_MID_TERM_CTRL1 0x1d8 #define QPHY_V5_PCS_UFS_MULTI_LANE_CTRL1 0x1e0 |