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authorIoana Ciornei <ioana.ciornei@nxp.com>2022-03-11 23:22:21 +0200
committerDavid S. Miller <davem@davemloft.net>2022-03-14 10:41:50 +0000
commit8f73b37cf3fbda67ea1e579c3b5785da4e7aa2e3 (patch)
tree0f46a07cae4a3adaf35fa6c096c1ac96d97ed843 /drivers/phy/freescale/Kconfig
parent92ebb2361e1b32d4b5975f017289473ed84ab86d (diff)
downloadlwn-8f73b37cf3fbda67ea1e579c3b5785da4e7aa2e3.tar.gz
lwn-8f73b37cf3fbda67ea1e579c3b5785da4e7aa2e3.zip
phy: add support for the Layerscape SerDes 28G
This patch adds a new generic PHY driver to support the Lynx 28G SerDes block found on some of the Layerscape SoCs such as LX2160A. At the moment, only the following Ethernet protocols are supported: SGMII/1000Base-X and 10GBaseR. SerDes lanes which are not running an Ethernet protocol or a currently supported Ethenet protocol will be left as it was configured through the RCW (Reset Configuration Word) at boot time. At probe time, the platform driver will read the current configuration of both PLLs found on a SerDes block and will determine what protocols are supported using that PLL. For example, if a PLL is configured to generate a clock net (frate) of 5GHz the only protocols sustained by that PLL are SGMII/1000Base-X (using a quarter of the full clock rate) and QSGMII using the full clock net frequency on the lane. On the .set_mode() callback, the PHY driver will first check if the requested operating mode (protocol) is even supported by the current PLL configuration and will error out if not. Then, the lane is reconfigured to run on the requested protocol. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/phy/freescale/Kconfig')
-rw-r--r--drivers/phy/freescale/Kconfig10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
index c3669c28ea9f..0e91cd99c36b 100644
--- a/drivers/phy/freescale/Kconfig
+++ b/drivers/phy/freescale/Kconfig
@@ -22,3 +22,13 @@ config PHY_FSL_IMX8M_PCIE
help
Enable this to add support for the PCIE PHY as found on
i.MX8M family of SOCs.
+
+config PHY_FSL_LYNX_28G
+ tristate "Freescale Layerscape Lynx 28G SerDes PHY support"
+ depends on OF
+ select GENERIC_PHY
+ help
+ Enable this to add support for the Lynx SerDes 28G PHY as
+ found on NXP's Layerscape platforms such as LX2160A.
+ Used to change the protocol running on SerDes lanes at runtime.
+ Only useful for a restricted set of Ethernet protocols.