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| author | Alexandre Ghiti <alexghiti@rivosinc.com> | 2023-08-02 10:03:21 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-08-16 07:28:17 -0700 |
| commit | e8b785e98abb0cc12edd4ba2d3ccad767ab8b68d (patch) | |
| tree | 87e724167adc3b4c01af9a3fb3bcdaefa2d82414 /drivers/perf | |
| parent | f117ae55b0198dd6fc36ce521e06d8b44a4bb203 (diff) | |
| download | lwn-e8b785e98abb0cc12edd4ba2d3ccad767ab8b68d.tar.gz lwn-e8b785e98abb0cc12edd4ba2d3ccad767ab8b68d.zip | |
riscv: Make legacy counter enum match the HW numbering
RISCV_PMU_LEGACY_INSTRET used to be set to 1 whereas the offset of this
hardware counter from CSR_CYCLE is actually 2: make this offset match the
real hw offset so that we can directly expose those values to userspace.
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Diffstat (limited to 'drivers/perf')
| -rw-r--r-- | drivers/perf/riscv_pmu_legacy.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c index ca9e20bfc7ac..6a000abc28bb 100644 --- a/drivers/perf/riscv_pmu_legacy.c +++ b/drivers/perf/riscv_pmu_legacy.c @@ -13,7 +13,7 @@ #include <linux/platform_device.h> #define RISCV_PMU_LEGACY_CYCLE 0 -#define RISCV_PMU_LEGACY_INSTRET 1 +#define RISCV_PMU_LEGACY_INSTRET 2 static bool pmu_init_done; |